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ECE 3421: Very Large Scale Integrated (VLSI) Design and Simulation
Design of MOS transistors, including short channel effects in sub-micron devices; scaling laws; design rules. Layout of NMOS and CMOS logic gates; power-delay calculations. Design of static and/or dynamic memories. Laboratory emphasizes schematic capture, simulation, timing analysis and testing; layout of custom IC's; use of VHDL.
- Credits
- 4
- Offered
- Spring 2027
- Campuses
- Storrs
- Requirements
- CSE 2300W or 2301; ECE 3201; open only to students in the School of Engineering.
Spring 2027 sections
Taught by Lei Wang.
| Section | Type | Meets | Instructor | Campus | Room | Seats |
|---|---|---|---|---|---|---|
| 001 | LEC | 12:30PM - 1:20PM / MoWe | Lei Wang | Storrs | 6 of 30 open | |
| 002L | LAB | 2:30PM - 4:30PM / We | Lei Wang | Storrs | 0 of 15 open | |
| 003L | LAB | 5:00PM - 7:00PM / We | Lei Wang | Storrs | 6 of 15 open |
Seats as of Nov 12, 2026. HuskyScheduler shows live seats when you search.
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